From 3b54949fcee5e0a7d89f54f7ede2d5bbb1013ebb Mon Sep 17 00:00:00 2001 From: Alex Williamson Date: Mon, 18 Jun 2007 13:41:31 -0600 Subject: [PATCH] [IA64] Improve priv_emulate() isr.code handling for IA64_GENEX_VECTOR Better handling of isr.code if priv_emulate() fails with IA64_GENEX_VECTOR. Signed-off-by: Dietmar Hahn --- xen/arch/ia64/xen/faults.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/ia64/xen/faults.c b/xen/arch/ia64/xen/faults.c index 0d04b21e9b..7528d2e0ca 100644 --- a/xen/arch/ia64/xen/faults.c +++ b/xen/arch/ia64/xen/faults.c @@ -544,6 +544,14 @@ ia64_handle_privop(unsigned long ifa, struct pt_regs *regs, unsigned long isr, if (vector != IA64_NO_FAULT && vector != IA64_RFI_IN_PROGRESS) { // Note: if a path results in a vector to reflect that requires // iha/itir (e.g. vcpu_force_data_miss), they must be set there + /* + * IA64_GENEX_VECTOR may contain in the lowest byte an ISR.code + * see IA64_ILLOP_FAULT, ... + */ + if ((vector & ~0xffUL) == IA64_GENEX_VECTOR) { + isr = vector & 0xffUL; + vector = IA64_GENEX_VECTOR; + } reflect_interruption(isr, regs, vector); } } -- 2.30.2